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Triple-Output Charge Pump Regulator General Description
The AAT2820 is a member of AnalogicTech's Total Power Management ICTM (TPMICTM) product family. It is a triple output charge pump targeted for active matrix thin-film transistor (TFT), liquid crystal displays (LCDs), and CCD camera bias for systems operating with lithium-ion/polymer batteries. The device generates three regulated output voltages for turn-on gate drive bias (VPOS), turn-off gate voltage bias (VNEG), and logic voltage. The VPOS and VNEG output voltages are independently regulated. Both outputs use external diode and capacitor multiplier stages (as many stages as required) to regulate output voltages up to +25V and -25V. An additional regulated output voltage is provided for biasing the display module. Built-in soft-start circuitry prevents excessive inrush current during start-up. A high switching frequency enables the use of very small external capacitors. A low shutdown feature disconnects the load from VIN and reduces quiescent current to less than 0.1A. The AAT2820 is available in a Pb-free TDFN44-16 package and is specified over the -40C to +85C operating temperature range.
AAT2820
Features
* * *
ChargePumpTM
* * * * * * *
VIN Range: 2.7V to 5.5V 5V Regulated Output Voltage Two Adjustable Regulated Output Voltages: VPOS and VNEG -- Positive Charge Pump Up to +25V -- Negative Charge Pump Down to -25V -- Optional Power-Up Sequence with AAT2820-1 Internal Power MOSFETs <1A of Shutdown Current Internally Controlled Soft Start Fast Transient Response Ultra-Thin Solution (No Inductors) 16-Pin TDFN44 Package Temperature Range: -40C to +85C
Applications
* * * * * CCD Cameras Hand-Held Instruments Passive-Matrix Displays Personal Digital Assistants (PDAs) TFT Active-Matrix LCDs
Typical Application
C FLY
C+
CEN
VIN
CIN
IN
Enable Enable (Positive and Negative Output) VOUT
COUT
EN/PN
DRVN
OUT
AAT2820
FBN DRVP
VNEG
REF
GND
FBP
VPOS
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Triple-Output Charge Pump Regulator Pin Description
Pin #
1 2 3, 4, 8, 9, 12 5 6 7 10 11 13 14 15 16 EP
AAT2820
Symbol
DVRP DRVN GND OUT IN EN CC+ FBP EN/PN REF FBN
Function
Positive charge pump driver output. Output high level is VSUPP and low level is PGND. Negative charge pump driver output. Output high level is VSUPN and low level is PGND. Ground connection. Regulated 5V output. Requires a 4.7F bypass capacitor to ground. Input power supply. A 1A capacitor should be connected between this pin and ground. Enable input control pin. When low, the device is powered down and consumes less than 0.1A. This pin should not be left floating. Flying capacitor negative terminal. Flying capacitor positive terminal. Connect a 1F capacitor between C+ and C-. Positive charge pump feedback input. Regulates to 1.2V nominal. Connect feedback resistive divider to analog ground (GND). Enable input. When EN/PN is pulled low, VPOS and VNEG are turned off. Internal reference bypass terminal. Connect a 0.1F capacitor from this terminal to analog ground (GND). External load capability to 50uA. REF is disabled in shutdown. Negative charge pump regulator feedback input. Regulates to 0V nominal. Connect feedback resistive divider to the reference (REF). Exposed paddle (bottom); connect to GND directly beneath package.
Pin Configuration
TDFN44-16 (Top View)
DRVP DRVN GND GND OUT IN EN GND
1 2 3 4 5 6 7 8
16 15 14 13 12 11 10 9
FBN REF EN/PN FBP GND C+ CGND
2
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Triple-Output Charge Pump Regulator Absolute Maximum Ratings1
Symbol
VIN VOUT VEN VN_CH VP_CH Other Inputs IMAX TLEAD
AAT2820
Description
Input Voltage Charge Pump Output EN or EN/PN to GND DRVN to GND DRVP to GND REF, FBN, FBP to GND Continuous Current into DRVN, DRVP, OUT All Other Pins Maximum Soldering Temperature (at leads, 10 sec)
Value
-0.3 to 6.0 -0.3 to 6.0 -0.3 to 6.0 -0.3V to (VIN + 0.3V) -0.3V to (VIN + 0.3V) -0.3V to (VIN + 0.3V) 200 10 300
Units
V V V V V V mA C
Thermal Information2
Symbol
JA PD
Description
Maximum Thermal Resistance Power Dissipation3
Value
50 2.0
Units
C/W W
1. Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. Functional operation at conditions other than the operating conditions specified is not implied. Only one Absolute Maximum Rating should be applied at any one time. 2. Mounted on an FR4 board. 3. Derate 6.25mW/C above 25C. 2820.2006.04.1.4
3
Triple-Output Charge Pump Regulator Electrical Characteristics1
VIN = 3.3V; CIN = COUT = CFLY = 1.0F, TA = 0C to +85C, unless otherwise noted. Typical values are TA = 25C. Symbol Description
VIN UVLO ICC ISD TSS FOSC Negative VFBN IFBN INEG RDS_NCH Input Supply Range Input Under-Voltage Lockout Threshold Operating Current
AAT2820
Conditions
VIN Rising VIN Falling VFBP = 1.5V, VFBN = -0.2V, No Load on DRVN and DRVP; EN = EN/PN = VIN VEN = VEN/PN = 0V
Min Typ Max Units
2.7 1.8 1.6 5.0 0.1 200 1.0 -100 -100 0 5.5 V V mA A s MHz mV nA mA k V nA mA k
Shutdown Supply Current Soft-Start Time Operating Frequency Low-Power Charge Pump FBN Regulation Voltage FBN Input Bias Current Maximum Negative Output Current2 DRVN NCH On-Resistance MIN DRVN PCH On-Resistance RDS_PCH MAX DRVN PCH On-Resistance Positive Low-Power Charge Pump VFBP FBP Regulation Voltage IFBP FBP Input Bias Current IPOS Maximum Positive Output Current2 RDS_PCH DRVP PCH On-Resistance MIN DRVP NCH On-Resistance RDS_NCH MAX DRVP NCH On-Resistance Reference Reference Voltage VREF Reference Under-Voltage Lockout Threshold VEN(L) EN and EN/PN Threshold Low VEN(H) EN and EN/PN Threshold High II Enable Input Current TSD Over-Temperature Shutdown Threshold THYS Over-Temperature Shutdown Hysteresis Regulated 5V Charge Pump Output Voltage Tolerance VOUT Output Voltage IOUT Maximum Output Current2
1.0
VFBN = -50mV 3.3 VIN 5.5; No Load at VPOS and VOUT VFBN = 100mV, VIN = 4V VFBN = -100mV, VIN = 4V
1.5 1.0 20 1.15 -60 1.2
+100 +100 25 5.0 5.0
VFBP = 1.5V 3.3 VIN 5.5; No Load at VNEG and VOUT VFBP = 1.15V, VIN = 4V VFBP = 1.25V, VIN = 4V -2.0A < IREF < 50A VREF Rising
1.0 3 20 1.18 1.2 0.8
1.25 +100 25 5.0 15
1.22 V 0.5 V V A C C
1.5 -1.0 140 15
1.0
2.7V < VIN < 5V, IOUT = 50mA 3.0V < VIN < 5V, IOUT = 100mA 3.3 VIN 5.5; No Load at VPOS and VNEG
4.8
4.0 5.0
5.2 150
% V mA
1. The AAT2820 is guaranteed to meet performance specifications from 0C to 70C. Specification over the -40C to +85C operating temperature range is assured by design, characterization, and correlation with statistical process controls. 2. Loads greater than those listed in maximum output load conditions may cause permanent damage to the device.
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Triple-Output Charge Pump Regulator Typical Characteristics
VIN = 3.3V, VOUT = 5V, VPOS = 12.5V, VNEG = -7.8V, CIN = CFLY = 1F, COUT = 4.7F; TA = 25C, unless otherwise noted.
5V Output vs. Output Current
5.2 100
AAT2820
5V Output Efficiency vs. Output Current
(No-Load at VPOS and VNEG)
Output Voltage (V)
Efficiency (%)
5.0 4.8 4.6 4.4 4.2
VIN = 4.2V
90 80 70 60 50 40 30 20 10 0
VIN = 3.0V VIN = 2.7V VIN = 3.3V VIN = 4.2V
VIN = 3.3V VIN = 2.7V VIN = 3.0V
0 50 100 150 200 250 300
0.1
1.0
10
100
1000
Output Current (mA)
Output Current (mA)
5V Output Voltage vs. Temperature
(No-Load at VPOS and VNEG)
5.02 70
5V Output Efficiency vs. Output Current
(VOUT = 5V; VPOS = 12.5V @ 10mA; VNEG = -7.8V @ 5mA)
5V Output Voltage (V)
5.00 4.98 4.96 4.94 4.92 4.90 -40
VIN = 4.2V
60
Efficiency (%)
50 40 30 20 10 0
VIN = 2.7V VIN = 4.2V
VIN = 2.7V
VIN = 3.3V
VIN = 3.3V
-20
0
20
40
60
80
100
0
20
40
60
80
100
120
140
160
Temperature (C)
Output Current (mA)
Switching Frequency vs. Temperature
Switching Frequency (kHz)
930 920 910 900 890 880 870 860 850 840 -40 -20 0 20 40 60 80 100 5.7
Operating Current vs. Temperature
Operating Current (mA)
5.6 5.5 5.4 5.3 5.2 5.1 5.0 4.9 -40 -20 0 20 40 60 80 100
Temperature (C)
Temperature (C)
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Triple-Output Charge Pump Regulator Typical Characteristics
VIN = 3.3V, VOUT = 5V, VPOS = 12.5V, VNEG = -7.8V, CIN = CFLY = 1F, COUT = 4.7F; TA = 25C, unless otherwise noted.
Reference Voltage vs. Temperature
Positive Output Voltage (V)
1.22
AAT2820
Positive Charge Pump Output Voltage vs. Temperature
(No Load at VNEG and VOUT)
12.70 12.65 12.60 12.55 12.50 12.45 12.40 12.35 12.30 -40 -20 0 20 40 60 80 100
Reference Voltage (V)
VPOS = 12.5V IPOS = 5mA IPOS = 15mA
1.21 1.20 1.19 1.18 1.17 -40 -20 0 20 40 60 80 100
Temperature (C)
Temperature (C)
Positive Charge Pump Output Voltage vs. Output Current
(No Load at VNEG and VOUT)
Positive Output Voltage (V)
12.5 12.4 12.3 12.2
Positive Charge Pump Efficiency vs. Output Current
(No Load at VNEG and VOUT)
80
Efficiency (%)
VIN = 4.2V
70 60 50 40 30 20
VIN = 2.7V
VIN = 3.0V
VIN = 3.3V VIN = 4.2V
VIN = 2.7V
12.1 12
VIN = 3.3V
0
5
10
15
20
25
30
0
5
10
15
20
25
30
Output Current (mA)
Output Current (mA)
Negative Charge Pump Output Voltage vs. Temperature
(No Load at VPOS and VOUT)
Negative Charge Pump Output vs. Output Current
(No Load at VPOS and VOUT)
-7.6
Negative Output Voltage (V)
-7.65 -7.70 -7.75 -7.80 -7.85 -7.90 -7.95 -8.00 -8.05 -8.10 -8.15 -40 -20 0 20 40 60 80 100
VNEG = -7.8V
Output Voltage (V)
-7.5 -7.4 -7.3 -7.4 -7.1 0 5 10 15
VIN = 2.7V VIN = 3.3V
INEG = 15mA INEG = 5mA
VIN = 4.2V
20
25
30
Temperature (C)
Output Current (mA)
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Triple-Output Charge Pump Regulator Typical Characteristics
VIN = 3.3V, VOUT = 5V, VPOS = 12.5V, VNEG = -7.8V, CIN = CFLY = 1F, COUT = 4.7F; TA = 25C, unless otherwise noted.
AAT2820
Negative Charge Pump Efficiency vs. Output Current
(No Load at VPOS and VOUT)
70 65 60
Load Transient Response
(10mA - 100mA; VIN = 3.3V)
5.05 5.00
VIN = 2.7V
Output Current (50mA/div) (bottom)
Output Voltage (50mV/div) (top)
4.95 4.90 4.85 100mA 10mA ROUT = 500 to 55 0.15 0.10 0.05 0.00 -0.05
Efficiency (%)
55 50 45 40 35 30 25 20 0 5 10 15 20 25 30
VIN = 3.3V VIN = 4.2V
VIN = 3.0V
Time (50s/div)
Output Current (mA)
Output Ripple Waveform
(VOUT = 5V @ 100mA; VPOS = 12.5V @ 10mA; VNEG = -7.8V @ 10mA) VOUT (20mV/div) VPOS (10mV/div)
3V
5V Output Startup Time with 100mA Load
Enable (1V/div)
0V +5V
VNEG (10mV/div) Time (250ns/div)
VOUT (1V/div)
0V
Time (100s/div)
AAT2820 Power-Up Sequence
AAT2820-1 Power-Up Sequence
(VIN = 4.2V)
Enable (2V/div) VOUT (5V/div) VPOS (10V/div) VNEG (10V/div) Time (250s/div)
4V 0V 5V 0V 10V 0V 0V -10V
Enable (2V/div) VOUT (5V/div) VPOS (10V/div) VNEG (10V/div) Time (250s/div)
4V 0V 5V 0V 10V 0V 0V -10V
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Triple-Output Charge Pump Regulator Typical Characteristics
VIN = 3.3V, VOUT = 5V, VPOS = 12.5V, VNEG = -7.8V, CIN = CFLY = 1F, COUT = 4.7F; TA = 25C, unless otherwise noted.
Maximum Line Load
(Positive Charge Pump)
27 24 21 5 Stages -3 -6 -9 2 Stages
AAT2820
Maximum Line Load
(Negative Charge Pump)
3 Stages
18 15 12 9 6 0 2 Stages 5 3 Stages 10 4 Stages 15
VNEG (V)
VPOS (V)
6 Stages
-12 -15 -18 -21 -24 4 Stages 0 5 10 15 20 25 30 5 Stages 6 Stages
20
25
30
-27
IPOS (mA)
INEG (mA)
8
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Triple-Output Charge Pump Regulator Functional Block Diagram
C+ C-
AAT2820
Soft Start
EN
1MHz Oscillator
2X Charge Pump
OUT
IN
VREF
Reference Oscillator
EN/PN
Control Logic
Charge Pump
DVRP DVRN FBP REF
OverTemperature Protection VREF
FBN
GND
Functional Description
5V Regulated Output
The main power supply is a charge pump doubler architecture used to support the high-current demand required by the application. Charge pump regulation is achieved by sensing the output voltage through an internal resistor divider network. A switch doubling circuit is enabled when the divided output drops below a preset trip point controlled by an internal comparator. The free-running charge pump switching frequency is approximately 1MHz. The charge pump is designed to deliver 150mA of continuous current (loads greater than the maximum load condition may cause permanent damage to the device).
pumps. Using a single stage, the first charge pump inverts the supply voltage (VIN) and provides a regulated negative output voltage. The second charge pump doubles VIN and provides a regulated positive output voltage. These outputs use external Schottky diodes and capacitor multiplier stages (as many as required) to regulate up to 25V. A constant switching frequency of 1MHz minimizes the output ripple and capacitor size.
Negative Charge Pump Regulator
During the first half-cycle, the P-channel MOSFET turns on and the flying capacitor C11 charges to VIN minus a diode drop (Figure 1). During the second half-cycle, the P-channel MOSFET turns off and the N-channel MOSFET turns on, level shifting C11. This connects C11 in parallel with the output reservoir capacitor C23. If the voltage across C23 minus a diode drop is less than the voltage across C11, current flows from C11 to C23 until the diode turns off. 9
Dual Charge Pump Regulators
The dual charge pump provides low-power regulated output voltages from two individual charge
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Triple-Output Charge Pump Regulator
Positive Charge Pump Regulator
During the first half-cycle, the N-channel MOSFET turns on and charges the flying capacitor C12 (Figure 2). During the second half-cycle, the Nchannel MOSFET turns off and the P-channel MOSFET turns on, level shifting C12 the input voltage. This connects C12 in parallel with the reservoir capacitor C24. If the voltage across C24 plus a diode drop is less than the level shifted by the flying capacitor (C12 + VIN), charge is transferred from C12 to C24 until the diode turns off. If the positive charge pump output is connected to ground, output may not recover until power is recycled. Loads greater than the maximum load condition may cause permanent damage to the device; please review the Maximum Line Load Curves and the Electrical Characteristics table.
AAT2820
Enable
In the normal operating state, the AAT2820 typically consumes 5mA of quiescent operating current. By pulling the enable pin (EN) low, the AAT2820 disables all three outputs. Once the device is shut down, the supply current drops to less than 1A to maximize battery life. The AAT2820 gives the application an option to independently turn on/off the positive and negative charge pump outputs. These two outputs can be disabled by pulling the EN/PN pin low. The threshold levels lie between 0.5V and 1.5V. Depending on the application, the supplies must be sequenced properly to avoid damage or latch-up.
Soft-Start and Start-up Sequence
The AAT2820 has an internal soft-start circuit to guarantee a smooth transition to 5V for the main output when the device is enabled (typical 200s). This device has two versions for the start-up sequence. The AAT2820 ramps up the positive charge pump after the negative charge pump is present; the AAT2820-1 ramps up the positive charge pump before the negative charge pump.
Voltage Reference
The voltage reference is a simple band gap with an output voltage equal to VBE + K*VT. The band gap reference amplifier has an additional compensation capacitor from the negative input to the output. This capacitor serves to slow down the circuit during startup and soft starts the voltage reference and the regulator output from overshoot. The reference circuit amplifier also increases the overall PSRR of the device. An 80k resistor serves to isolate and buffer the amplifier from a small internal filter capacitor and an optional large external filter capacitor.
Over-Temperature Protection
To protect the AAT2820, as well as the system application, this device has a thermal protection circuit that will shut down all the charge pumps if the die temperature rises above the preset internal thermal limit. This protects the device if the ambient temperature exceeds the operating limit for the device.
IN
IN
OSC
CTL
DRVN
C11 1/2 A3
VIN OSC C12 CTL DRVP
1/2 A4
BAT54SDW
BAT54SDW
FBN R1 VON = -(R1/R2) x VREF VON R2 VREF 1.2V C23 C5
FBP
R4
VOP
R4 VOP = 1 + x VREF R3
VREF 1.2V GND
R3
C24
GND
Figure 1: Negative Charge Pump Block Diagram. 10
Figure 2: Postive Charge Pump Block Diagram.
2820.2006.04.1.4
Triple-Output Charge Pump Regulator Design Procedure and Component Selection
Number of Stages for Dual Charge Pump Regulators
The number of stages required can be determined by:
VPOS - 5 5 - 2VFWD
AAT2820
VPOS (V)
7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
# of Stages (n)
1 1 1 2 2 2 2 3 3 3 3 3 4 4 4 4 5 5 5
NPOS =
for the positive output, and
VNEG 2VFWD - 5
NNEG =
for the negative output. Where, VNEG = Negative output voltage VPOS = Positive output voltage VFWD = Forward voltage drop of the Schottky diode (0.31V, based on BAT54SDW diode when IF = 4mA) After solving for the number of stages (NPOS and NNEG), round up the solutions to the next highest integers for the number of stages required. Tables 1 and 2 show the number of stages required for positive and negative charge pumps, respectively.
Table 1: Number of Stages Required for Positive Charge Pump. VNEG (V)
-7 -8 -9 -10 -11 -12 -13 -14 -15 -16 -17 -18 -19 -20 -21 -22 -23 -24 -25
# of Stages (n)
2 2 3 3 3 3 3 4 4 4 4 5 5 5 5 6 6 6 6
Table 2: Number of Stages Required for Negative Charge Pump.
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Triple-Output Charge Pump Regulator
VNEG
The negative output voltage is adjusted by a resistive divider from the output (VNEG) to the FBN and REF pin. The maximum reference voltage current is 50A; therefore, the minimum allowable value for R2 of Figure 1 is 24k. It is best to select the smallest value possible for R2 as this will keep R1 to a minimum. This limits errors due to the FBN input bias current. The FBN input has a maximum input bias current of 100nA. Using the full 50A reference current for programming VNEG: VNEG (V)
-7 -8 -9 -10 -11 -12 -13 -14 -15 -16 -17 -18 -19 -20 -21 -22 -23 -24 -25
AAT2820
R1, Closest Value (k)
143 162 182 205 226 243 267 287 309 324 348 360 390 412 430 453 470 487 510
IPGM =
VREF 1.2V = = 50A R2 24k
will limit the error due to the input bias current at FBN to less than 0.2%.
IFBN 0.1A = = 0.2% IPGM 50A
Table 3: Closest Value for R1 if Using 24.3k as R2.
With R2 selected, R1 can be determined by:
V * R2 R1 = NEG -VREF
VPOS
The positive output voltage is set by way of a resistive divider from the output (VPOS) to the FBP and ground pin. Limiting the size of R3 reduces the effect of the FBP bias current. For less than 0.1% error, limit R3 to less than 12k.
See the example in Table 3.
IPGM =
VREF 1.2V = = 100A R3 12k
IFBN 0.1A = = 0.1% IPGM 100A
Once R3 has been determined, then solve for R4 (see example in Table 4).
VPOS R4 = R3 * V -1 REF
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Triple-Output Charge Pump Regulator
VPOS (V)
7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
AAT2820
R4, Closest Value (k)
59.0 69.8 78.7 88.7 100.0 110.0 120.0 130.0 140.0 150.0 160.0 169.0 180.0 191.0 200.0 210.0 220.0 232.0 240.0
back-injected line noise may be further reduced by increasing the value of CIN. A low equivalent series inductance (ESL) ceramic capacitor is ideal for this function. The size required will vary depending on the load, output voltage, and input voltage characteristics. Other types of capacitors may be used for CIN at the cost of compromised circuit performance.
Output Capacitor
The output capacitor (COUT) should be connected between the OUT pin and ground. Switching noise and ripple seen on the charge pump output increases with load current. Typically, the output capacitor should be 5 to 10 times greater than the flying capacitor. To minimize stray inductance, the capacitor should be placed as closely as possible to the IC. This keeps the high frequency content of the input current localized, minimizing radiated and conducted EMI. A 1F ceramic capacitor is recommended for most applications for optimum transient response. However, if the application has a larger load from the main and multiplier stage charge pump outputs, a 4.7F ceramic capacitor is suggested to reduce the feedback injection noise from the multiplier stage and lower switching ripple. Capacitor types other than ceramic capacitors can be used for COUT. However, capacitors composed of non-ceramic material will typically have a greater value of ESR, resulting in increased output switching ripple.
Table 4: Closest Value for R4 if Using 12.1k as R3.
Capacitor Selection
Careful selection of the three external capacitors CIN, CFLY, and COUT is important because they will affect turn-on time, output ripple, efficiency, and load transient response. Optimum performance will be obtained when low equivalent series resistance (ESR) ceramic capacitors are used. In general, low ESR may be defined as less than 100m. A value of 1F for input and flying capacitors is a good starting point when designing with the AAT2820. This not only provides for a very small printed circuit board area, but cost is further reduced by the minimized bill of materials.
Charge Pump Capacitor (CFLY)
Due to the switching operation of the voltage doubling circuit topology, current flow through the flying capacitor is bi-directional. The flying capacitor selected must be a non-polarized type. A 1F low ESR ceramic capacitor is ideal for most applications.
Input Capacitor
A 1F multilayer ceramic chip capacitor is suggested for the input. This capacitor should be connected between the IN pin and ground; 1F should be suitable for most applications. Even though the AAT2820 switching ripple and noise are very low,
Capacitor Characteristics
Ceramic composition capacitors are highly recommended over all other types of capacitors for use with the AAT2820. Ceramic capacitors offer many advantages over their tantalum and aluminum electrolytic counterparts. A ceramic capacitor typically has very low ESR, is lowest cost, has a smaller
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Triple-Output Charge Pump Regulator
PCB footprint, and is non-polarized. Low ESR ceramic capacitors help maximize charge pump transient response. Since ceramic capacitors are non-polarized, they are not prone to incorrect connection damage. both the positive and negative charge pumps (regardless of the number of stages) is:
AAT2820
VRESERVE = VIN - VF
The BAT54SDW quad Schottky in an SOT363 (2x2mm) package is a good choice for multiplestage charge pump configuration (see evaluation board schematic in Figure 3).
Rectifier Diodes
For the rectifiers, use Schottky diodes with a voltage rating of 1.5X the input voltage. The maximum steady-state voltage seen by the rectifier diodes for
VIN VOUT_5V
A3 2 1 Stage 12 2 J5 C23 1F C22 1F J4 Stage 12 3 J3 Stage 12 4 C21 1F C20 1F J2 Stage 12 5 J1 Stage 12 6 C19 1F C18 1F 2 1 5 4 BAT54SDW 3 6 C7 Enable 0.1F C6 0.1F C4 GND GND C3 C1 1F 123 2 1 5 4 BAT54SDW A1 3 6 C9 0.1F C8 0.1F 5 4 BAT54SDW A2 6 C11 0.1F 3 C10 0.1F 1 2 3 4 5 6 7 8 U1 DRVP FBN DRVN REF GND EN/PN GND OUT IN EN GND FBP GND C+ CGND 16 15 14 13 12 11 10
C2
SP SN Enable/PN 123 R1 C12 0.1F C13 0.1F 6 3
A4 4 5 1 2 BAT54SDW A5 3 4 5 6 1 2 BAT54SDW A6 3 4 5 6 1 2 BAT54SDW C29 1F C28 1F C27 1F J9 12 J10 12 Stage 5 Stage 6 C26 1F C25 1F J7 12 J8 12 C24 1F J6 12 Stage 2
R2 24.3K C5 0.1F R4
C14 0.1F C15 R3 12.1K 0.1F
Stage 3 Stage 4
9 1F C16 0.1F C17 0.1F
AAT2820
VOUT_N
VOUT_P
1F 4.7F
GND
C1 Taiyo Yuden LMK212 BJ105KD 1F 10V X7R 0805 C2 Taiyo Yuden LMK107 BJ105KA 1F 10V X7R 0603 C3 Taiyo Yuden LMK212 BJ475KD 4.7F 10V X5R 0805 C5, C9-C14 Taiyo Yuden EMK107 BJ104MA 0.1F 16V X7R 0603 C6-C8, C15-C17 Taiyo Yuden TMK107 BJ104KA 0.1F 25V X5R 0603 C20-C27 Taiyo Yuden EMK212 BJ105KG 1F 16V X7R 0805 C18, C19, C28, C29 Taiyo Yuden TMK212 BJ105KG 1F 25V X5R 0805 [Optional] C4 Taiyo Yuden LMK212 BJ105KD 1F 10V X7R 0805
Figure 3: AAT2820 Evaluation Board Schematic (Shown With Six Stages).
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Triple-Output Charge Pump Regulator
Flying and Output Capacitor Multiplier Stages
A 0.1F X7R or X5R ceramic capacitor is typically used. The voltage rating of the flying and reservoir output capacitors will vary with the number of charge pump stages. The reservoir output capacitor should be roughly 10X the flying capacitor. Use larger capacitors for reduced output ripple. A 1F X7R or X5R type ceramic is typically used.
AAT2820
Negative Charge Pump Capacitor Voltage Ratings
The absolute steady-state maximum output voltage (neglecting the internal RDS(ON) drop of the internal MOSFETs) for the nth stage is:
VBULK(n) = -n * VIN + 2 * n * VFWD
This is also the voltage rating required for the nth bulk capacitor in the negative output charge pump. The voltage rating for the nth flying capacitor in the negative stage (see Table 6) is:
Positive Charge Pump Capacitor Voltage Ratings
The absolute steady-state maximum output voltage (neglecting the internal RDS(ON) drop of the internal MOSFETs) for the nth stage is:
VFLY(n) = VFWD - VBULK(n)
VBULK(n) = (n + 1) * VIN - 2 * n * VFWD
where VFWD is the estimated forward drop of the Schottky diode. This is also the voltage rating required for the nth bulk capacitor in the positive output charge pump. The voltage rating for the nth flying capacitor in the positive stage is: # of Stages (n)
1 2 3 4 5 6
VBULK(n)
-4.4V -8.8V -13.2V -17.6V -22.0V -26.4V
VFLY(n)
4.7V 9.1V 13.5V 17.9V 22.3V 26.7V
VFLY(n) = VBULK(n + 1) - VFWD
Table 6: Negative Charge Pump Capacitor Voltages (VFWD = 0.31V).
where VBULK(0) is the input voltage (see Table 5). # of Stages (n)
1 2 3 4 5 6
VBULK(n)
9.4V 13.8V 18.2V 22.6V 27.0V 31.4V
VFLY(n)
4.7V 9.1V 13.5V 17.9V 22.3V 26.7V
PC Board Layout
The input and reference capacitor should be placed as closely to the IC as possible. Place the programming resistors (R1-R4) close to the IC, minimizing trace length to FBN and FBP. Place the main charge pump flying capacitor close to the C+ and C- pins, with wide traces and no vias. Place all multiplier stage (charge pump) circuitry to the IC as closely as possible using wide traces, and avoid using vias when possible. Figures 4 and 5 show the recommended evaluation board layout with the TDFN44-16 package.
Table 5: Positive Charge Pump Capacitor Voltages (VFWD = 0.31V).
2820.2006.04.1.4
15
Triple-Output Charge Pump Regulator
AAT2820
Figure 4: AAT2820 Evaluation Board Top Side Layout.
Figure 5: AAT2820 Evaluation Board Bottom Side Layout.
16
2820.2006.04.1.4
Triple-Output Charge Pump Regulator Ordering Information
Package
TDFN44-16 TDFN44-16
AAT2820
Power-Up Sequence
-, + +, -
Marking1
OCXYY ODXYY
Part Number (Tape and Reel)2
AAT2820IXN-5.0-T1 AAT2820IXN-5.0-1-T1
All AnalogicTech products are offered in Pb-free packaging. The term "Pb-free" means semiconductor products that are in compliance with current RoHS standards, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. For more information, please visit our website at http://www.analogictech.com/pbfree.
Package Information
Index Area (D/2 x E/2) Detail "B"
4.00 0.05
3.30 0.05
0.3 0.10 0.16
0.375 0.125
0.075 0.075 0.1 REF Detail "A"
Top View
Bottom View
Pin 1 Indicator (optional)
7.5 7.5
+ 0.05 0.8 -0.20
0.229 0.051
Detail "B"
Option A: C0.30 (4x) max Chamfered corner Option B: R0.30 (4x) max Round corner
0.05 0.05
Side View
All dimensions in millimeters
Detail "A"
1. XYY = assembly and date code. 2. Sample stock is generally held on part numbers listed in BOLD. 2820.2006.04.1.4
0.23 0.05
0.45 0.05
4.00 0.05
2.60 0.05
17
Triple-Output Charge Pump Regulator
AAT2820
(c) Advanced Analogic Technologies, Inc. AnalogicTech cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in an AnalogicTech product. No circuit patent licenses, copyrights, mask work rights, or other intellectual property rights are implied. AnalogicTech reserves the right to make changes to their products or specifications or to discontinue any product or service without notice. Customers are advised to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. AnalogicTech warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with AnalogicTech's standard warranty. Testing and other quality control techniques are utilized to the extent AnalogicTech deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed. AnalogicTech and the AnalogicTech logo are trademarks of Advanced Analogic Technologies Incorporated. All other brand and product names appearing in this document are registered trademarks or trademarks of their respective holders.
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830 E. Arques Avenue, Sunnyvale, CA 94085 Phone (408) 737-4600 Fax (408) 737-4611 18
2820.2006.04.1.4

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